Puma (microarchitecture)

Puma - Family 16h (2nd-gen)
Produced From mid-2014 to present
Common manufacturer(s)
Max. CPU clock rate 1.35 GHz to 2.5 GHz
Min. feature size 28 nm
Instruction set AMD64 (x86-64)
Cores 2–4
Core name(s)
  • Beema
  • Mullins
L1 cache 64 KB per core[1]
L2 cache 1 MB to 2 MB shared
Socket(s)
Predecessor Jaguar - Family 16h
GPU Radeon Rx: 128 cores, 300–800 Mhz
Brand name(s)

The Puma Family 16h is a low-power microarchitecture by AMD for its APUs. It succeeds the Jaguar as a second-generation version, targets the same market, and belongs to the same AMD architecture Family 16h. The Beema line of processors are aimed at low-power notebooks, and Mullins are targeting the tablet sector.

Design

The Puma cores use the same microarchitecture as Jaguar, and inherits the design:

Instruction set support

Like Jaguar, the Puma core has support for the following instruction sets and instructions: MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, BMI1, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM (POPCNT/LZCNT), and AMD-V.[1]

Improvements over Jaguar

  • 19% CPU core leakage reduction at 1.2V[3]
  • 38% GPU leakage reduction
  • 500 mW reduction in memory controller power
  • 200 mW reduction in display interface power
  • Chassis temperature aware turbo boost[4]
  • Selective boosting according to application needs (intelligent boost)
  • Support for ARM TrustZone via integrated Cortex-A5 processor
  • Support for DDR3L-1866 memory[5]

Puma+

AMD released a revision of Puma core, Puma+, as a part of the Carrizo-L platform in 2015. The differences in the CPU microarchitecture are unclear. Puma+ featured 2 or 4 cores up to 2.5GHz and required the newer FP4 socket.[6]

Features and ASICs

BrandLlanoTrinityRichlandKaveriCarrizoBristol RidgeRaven RidgeDesna, Ontario, ZacateKabini, TemashBeema, MullinsCarrizo-LStoney Ridge
PlatformDesktop, MobileUltra-mobile
ReleasedAug 2011Oct 2012Jun 2013Jan 2014Jun 2015Jun 2016Oct 2017Jan 2011May 2013Q2 2014May 2015June 2016
Fab. (nm)GlobalFoundries 32 SOIGlobalFoundries 28 SHPGlobalFoundries 14LPP (FinFET)TSMC 4028
Die size (mm2)228246245244.62250.04210[7]75 (+ 28 FCH)~107TBA125
SocketFM1, FS1FM2, FS1+, FP2FM2+, FP3FM2+[lower-alpha 1], FP4AM4, FP4AM4, FP5FT1AM1, FT3FT3bFP4FP4
CPU micro-architectureAMD 10hPiledriverSteamrollerExcavatorZenBobcatJaguarPumaPuma+[8]Excavator
Memory supportDDR3-1866
DDR3-1600
DDR3-1333		DDR3-2133
DDR3-1866
DDR3-1600
DDR3-1333		DDR4-2933
DDR4-2667
DDR4-2400
DDR4-2133		DDR3L-1333
DDR3L-1066		DDR3L-1866
DDR3L-1600
DDR3L-1333
DDR3L-1066		DDR3L-1866
DDR3L-1600
DDR3L-1333		Up to
DDR4-2133
3D engine[lower-alpha 2]TeraScale (VLIW5)TeraScale (VLIW4)GCN 2nd Gen (Mantle, HSA)GCN 3rd Gen (Mantle, HSA)GCN 5th Gen[9] (Mantle, HSA)TeraScale (VLIW5)GCN 2nd GenGCN 3rd Gen[9]
Up to 400:20:8Up to 384:24:6Up to 512:32:8Up to 704:44:16[10]80:8:4128:8:4Up to 192:?:?
IOMMUv1IOMMUv2IOMMUv1[11]TBATBA
Video Decoder ASICUVD 3.0UVD 4.2UVD 6.0VCN 1.0[12]UVD 3.0UVD 4.0UVD 4.2UVD 6.0UVD 6.3
Video Encoding ASICN/AVCE 1.0VCE 2.0VCE 3.1N/AVCE 2.0VCE 3.1
GPU power savingPowerPlayPowerTuneN/APowerTune[13]
Max. displays[lower-alpha 3]2–32–42–434TBA2TBATBA
TrueAudioN/A[15]N/A[11]TBA
FreeSyncN/A1
2		N/ATBA
HDCP[lower-alpha 4]?1.41.4
2.2		?1.4
PlayReady[lower-alpha 4]?3.0 (upcoming)?
/drm/radeon[lower-alpha 5][16][17] N/AN/A
/drm/amdgpu[lower-alpha 5][18] N/A[19]N/A[19]
  1. ↑ No APU models. Athlon X4 845 only.
  2. ↑ Unified shaders : texture mapping units : render output units
  3. ↑ To feed more than two displays, the additional panels must have native DisplayPort support.[14] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed.
  4. 1 2 To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.
  5. 1 2 DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version.

Processors

Desktop/Mobile (Beema)

Family Model Socket CPU GPU TDP Memory
Cores Frequency Max. Turbo L2 Cache Model Config. Max. Freq.
A8 6410 Socket FT3b 4 2.0 GHz 2.4 GHz 2 MB Radeon R5 128:?:? 800 MHz 15 W DDR3L-1866
A6 6310 1.8 GHz Radeon R4 800 MHz
A4 6250J 2.0 GHz N/A Radeon R3 600 MHz 25 W DDR3L-1600
A4 6210 1.8 GHz Radeon R3 600 MHz 15 W
E2 6110 1.5 GHz Radeon R2 500 MHz
E1 6010 2 1.35 GHz 1 MB 350 MHz 10 W DDR3L-1333

Tablet (Mullins)

Family Model CPU GPU Power Memory
Cores Frequency Max. Turbo L2 Cache Model Config. Max. Freq. TDP SDP
A10 Micro 6700T 4 1.2 GHz 2.2 GHz 2 MB Radeon R6 128:?:? 500 MHz 4.5 W 2.8 W DDR3L-1333
A6 Micro 6500T 1.8 GHz Radeon R4 401 MHz
A4 Micro 6400T 1.0 GHz 1.6 GHz Radeon R3 350 MHz
E1 Micro 6200T 2 1.4 GHz 1 MB Radeon R2 300 MHz 3.95 W DDR3L-1066

References

  1. 1 2 "Software Optimization Guide for Family 16h Processors". AMD. Retrieved August 3, 2013.
  2. ↑ "AMD launches new Beema, Mullins SoCs". ExtremeTech. 2014-04-29. Retrieved 2014-05-02.
  3. ↑ Shimpi, Anand. "AMD Beema/Mullins Architecture & Performance Preview". AnandTech. Retrieved 29 April 2014.
  4. ↑ Shimpi, Anand. "New Turbo Boost, The Lineup and Trustzone". AnandTech. Retrieved 29 April 2014.
  5. ↑ Woligroski, Don. "Meet The Mullins And Beema Tablet APUs". Toms Hardware. Retrieved 29 April 2014.
  6. ↑ Cutress, Ian (12 May 2015). "AMD's Carrizo-L APU Unveiled". Anandtech. Retrieved 14 January 2017.
  7. ↑ "The Mobile CPU Comparison Guide Rev. 13.0 Page 5 : AMD Mobile CPU Full List". TechARP.com. Retrieved 13 December 2017.
  8. ↑ "AMD Mobile "Carrizo" Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015" (Press release). 2014-11-20. Retrieved 2015-02-16.
  9. 1 2 "AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver". VideoCardz.com. Retrieved 6 June 2017.
  10. ↑ Cutress, Ian (1 February 2018). "Zen Cores and Vega: Ryzen APUs for AM4 - AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm". Anandtech. Retrieved 7 February 2018.
  11. 1 2 Thomas De Maesschalck (2013-11-14). "AMD teases Mullins and Beema tablet/convertibles APU". Retrieved 2015-02-24.
  12. ↑ Larabel, Michael (17 November 2017). "Radeon VCN Encode Support Lands In Mesa 17.4 Git". Phoronix. Retrieved 20 November 2017.
  13. ↑ Tony Chen; Jason Greaves, "AMD's Graphics Core Next (GCN) Architecture" (PDF), AMD, retrieved 2016-08-13
  14. ↑ "How do I connect three or More Monitors to an AMD Radeon™ HD 5000, HD 6000, and HD 7000 Series Graphics Card?". AMD. Retrieved 2014-12-08.
  15. ↑ "A technical look at AMD's Kaveri architecture". Semi Accurate. Retrieved 6 July 2014.
  16. ↑ Airlie, David (2009-11-26). "DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33". Retrieved 2016-01-16.
  17. ↑ "Radeon feature matrix". freedesktop.org. Retrieved 2016-01-10.
  18. ↑ Deucher, Alexander (2015-09-16). "XDC2015: AMDGPU" (PDF). Retrieved 2016-01-16.
  19. 1 2 Michel Dänzer (2016-11-17). "[ANNOUNCE] xf86-video-amdgpu 1.2.0". lists.x.org.
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