10 µm process
The 10 μm process is the level of MOSFET semiconductor process technology that was commercially reached around 1971,[1][2] by leading semiconductor companies such as RCA and Intel.
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(process nodes) |
In 1960, Egyptian engineer Mohamed M. Atalla and Korean engineer Dawon Kahng, while working at Bell Labs, demonstrated the first MOSFET transistors with 20 μm and then 10 μm gate lengths.[3][4] In 1969, Intel introduced the 1101 MOS SRAM chip with a 12 μm process.[5][6][7]
Products featuring 10 μm manufacturing process
- RCA's CD4000 series of integrated circuits began with a 20 μm process in 1968, before gradually downscaling and eventually reaching 10 μm in the next several years.[8]
- Intel 1103, an early dynamic random-access memory (DRAM) chip launched in 1970, used an 8 μm process.[9]
- Intel 4004 CPU launched in 1971 was manufactured using a 10 μm process.[10]
- Intel 8008 CPU launched in 1972 was manufactured using this process.[11]
References
- Mueller, S (2006-07-21). "Microprocessors from 1971 to the Present". informIT. Retrieved 2012-05-11.
- Myslewski, R (2011-11-15). "Happy 40th birthday, Intel 4004!". TheRegister. Archived from the original on 2015-04-27. Retrieved 2015-04-19.
- Lojek, Bo (2007). History of Semiconductor Engineering. Springer Science & Business Media. pp. 321–3. ISBN 9783540342588.
- Voinigescu, Sorin (2013). High-Frequency Integrated Circuits. Cambridge University Press. p. 164. ISBN 9780521873024.
- "A chronological list of Intel products. The products are sorted by date" (PDF). Intel museum. Intel Corporation. July 2005. Archived from the original (PDF) on August 9, 2007. Retrieved July 31, 2007.
- "1970s: SRAM evolution" (PDF). Semiconductor History Museum of Japan. Retrieved 27 June 2019.
- Pimbley, J. (2012). Advanced CMOS Process Technology. Elsevier. p. 7. ISBN 9780323156806.
- Lojek, Bo (2007). History of Semiconductor Engineering. Springer Science & Business Media. p. 330. ISBN 9783540342588.
- Lojek, Bo (2007). History of Semiconductor Engineering. Springer Science & Business Media. pp. 362–363. ISBN 9783540342588.
The i1103 was manufactured on a 6-mask silicon-gate P-MOS process with 8 μm minimum features. The resulting product had a 2,400 μm, 2 memory cell size, a die size just under 10 mm2, and sold for around $21.
- "History of the Intel Microprocessor - Listoid". Archived from the original on 2015-04-27. Retrieved 2015-04-19.
- "History of the Intel Microprocessor - Listoid". Archived from the original on 2015-04-27. Retrieved 2015-04-19.
External links
| Preceded by 20 μm process |
MOSFET semiconductor device fabrication process | Succeeded by 6 μm process |
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