NAND gate

INPUT		OUTPUT
A	B	A NAND B
0	0	1
0	1	1
1	0	1
1	1	0

The TTL 7400 chip, containing four NANDs. The two additional pins supply power (+5 V) and connect the ground

In digital electronics, a NAND gate (NOT-AND) is a logic gate which produces an output which is false only if all its inputs are true; thus its output is complement to that of an AND gate. A LOW (0) output results only if all the inputs to the gate are HIGH (1); if any input is LOW (0), a HIGH (1) output results. A NAND gate is made using transistors and junction diodes. By De Morgan's theorem, a two-input NAND gate's logic may be expressed as AB=A+B, making a NAND gate equivalent to inverters followed by an OR gate.

The NAND gate is significant because any boolean function can be implemented by using a combination of NAND gates. This property is called functional completeness. It shares this property with the NOR gate.

Digital systems employing certain logic circuits take advantage of NAND's functional completeness.

The function NAND(a₁, a₂, ..., a_n) is logically equivalent to NOT(a₁ AND a₂ AND ... AND a_n).

One way of expressing A NAND B is ${\overline {A\land B}}$ , where the symbol ${\land }$ signifies AND and the bar signifies the negation of the expression under it: in essence, simply ${\displaystyle \neg (A\land B)}$ .

Symbols

There are three symbols for NAND gates: the MIL/ANSI symbol, the IEC symbol and the deprecated DIN symbol sometimes found on old schematics. For more information see logic gate symbols. The ANSI symbol for the NAND gate is a standard AND gate with an inversion bubble connected.


MIL/ANSI Symbol	IEC Symbol	DIN Symbol

Hardware description and pinout

NAND gates are basic logic gates, and as such they are recognised in TTL and CMOS ICs.

Implementations

The NAND gate has the property of functional completeness. That is, any other logic function (AND, OR, etc.) can be implemented using only NAND gates.^[1] An entire processor can be created using NAND gates alone. In TTL ICs using multiple-emitter transistors, it also requires fewer transistors than a NOR gate.

NMOS NAND gate	PMOS NAND gate	CMOS NAND gate	TTL NAND gate
The physical layout of a CMOS NAND	Die of a 74AHC00D quad 2-input NAND gate manufactured by NXP Semiconductors	Silicon implementation of 4 NAND gates in an integrated circuit

Alternatives

If no specific NAND gates are available, one can be made from NOR gates, because NAND and NOR gates are considered the "universal gates", meaning that they can be used to make all the other gates.^[1]

Desired gate	NOR Construction

References

1 2 Mano, M. Morris and Charles R. Kime. Logic and Computer Design Fundamentals, Third Edition. Prentice Hall, 2004. p. 73.

External links

TTL NAND and AND gates – All About Circuits

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[Mano-1] 1 2 Mano, M. Morris and Charles R. Kime. Logic and Computer Design Fundamentals, Third Edition. Prentice Hall, 2004. p. 73.

Logical connectives
Tautology/True $\top$
Alternative denial (NAND gate) $\uparrow$ Converse implication $\leftarrow$ Implication (IMPLY gate) $\rightarrow$ Disjunction (OR gate) $\lor$
Negation (NOT gate) $\neg$ Exclusive or (XOR gate) $\oplus$ Biconditional (XNOR gate) $\leftrightarrow$ Statement
Joint denial (NOR gate) $\downarrow$ Nonimplication $\nrightarrow$ Converse nonimplication $\nleftarrow$ Conjunction (AND gate) $\land$
Contradiction/False $\bot$