Sapphire Rapids

Sapphire Rapids is the Intel CPU microarchitecture based on the second refinement of the 10 nanometer process.[1][2] It will be used as part of the Eagle Stream server platform in 2021.[3]

Sapphire Rapids
Physical specifications
Transistors	7 nanometer or 10 nanometer transistors
History
Predecessor	Server: Ice Lake-SP (optimization)
Successor	Granite Rapids (unknown)

A leaked Intel slide shows DDR5 SDRAM support among the new features of Sapphire Rapids, where the integrated memory controller of previous microarchitectures used DDR4 SDRAM.[4]

Sapphire Rapids will be the processor for the first exascale supercomputer in the United States, Aurora, at Argonne National Laboratory.[5]

References

Eassa, Ashraf. "Here's How Intel Corp. Will Put Data Center Chips First". The Motley Fool. Retrieved 1 October 2017.
Mujtaba, Hassan (14 October 2019). "Intel Sapphire Rapids & Granite Rapids Xeons Are LGA 4677 Compatible". Wccftech. Retrieved 14 March 2020.
Mujtaba, Hassan (21 May 2019). "Intel Xeon Roadmap Leak, 10nm Ice Lake, Sapphire Rapids CPU Detailed". Wccftech. Retrieved 14 March 2020.
https://www.tomshardware.com/news/intel-server-ddr5-pcie-5.0-roadmap-leaked-granite-rapids,39403.html
Russell, John (17 November 2019). "Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI". HPCwire. Retrieved 18 November 2019.

Intel processors

Discontinued
BCD oriented (4-bit)	4004 (1971) 4040 (1974)
pre-x86 (8-bit)	8008 (1972) 8080 (1974) 8085 (1977)
Early x86 (16-bit)	8086 (1978) 8088 (1979) 80186 (1982) 80188 (1982) 80286 (1982)
x87 (external FPUs)	8/16-bit databus 8087 (1980) 16-bit databus 80187 80287 80387SX 32-bit databus 80387DX 80487
IA-32 (32-bit)	80386 SX 376 EX 80486 SX DX2 DX4 SL RapidCAD OverDrive A100/A110 Celeron (1998) M D (2004) Pentium Original P5 OverDrive Pro II II OverDrive III 4 M Dual-Core some Core Solo Duo Tolapai
x86-64 (64-bit)	Celeron D Dual-Core Pentium 4 D Extreme Edition Dual-Core some Core 2 some i7
Other	CISC iAPX 432 EPIC Itanium RISC i860 i960 StrongARM XScale

Current
IA-32 (32-bit)	Atom CE SoC Quark
x86-64 (64-bit)	Atom CE SoC Celeron Pentium Core i3 i5 i7 i9 M Xeon E3 E5 E7 D Phi

Lists
Celeron Pentium Pro II III 4 D M Core Core 2 i3 i5 i7 i9 M Atom Xeon Itanium

Related
Tick–tock model Chipsets GPUs GMA HD and Iris Graphics PCHs SCHs ICHs PIIXs Stratix Codenames

Microarchitectures

x86

P5	800 nm P5 600 nm P54C 350 nm P54CS P55C 250 nm Tillamook
P6, Pentium M, Enhanced Pentium M	500 nm P6 350 nm P6 Klamath 250 nm Mendocino Dixon Tonga Covington Deschutes Katmai Drake Tanner 180 nm Coppermine Coppermine T Timna Cascades 130 nm Tualatin Banias 90 nm Dothan Stealey Tolapai Canmore 65 nm Yonah Sossaman
NetBurst	180 nm Willamette Foster 130 nm Northwood Gallatin Prestonia 90 nm Tejas and Jayhawk Prescott Smithfield Nocona Irwindale Cranford Potomac Paxville 65 nm Cedar Mill Presler Dempsey Tulsa
Core	65 nm Merom-L Merom Conroe-L Allendale Conroe Kentsfield Woodcrest Clovertown Tigerton 45 nm Penryn Penryn-QC Wolfdale Yorkfield Wolfdale-DP Harpertown Dunnington
Nehalem	45 nm Auburndale Beckton (Nehalem-EX) Bloomfield Clarksfield Gainestown (Nehalem-EP) Havendale Jasper Forest Lynnfield 32 nm Arrandale Clarkdale Gulftown (Westmere-EP) Westmere-EX
Sandy Bridge	32 nm Sandy Bridge Sandy Bridge-E Gladden 22 nm Ivy Bridge Ivy Bridge-EP Ivy Bridge-EX
Haswell	22 nm Haswell 14 nm Broadwell
Skylake	14 nm Skylake Kaby Lake (Amber Lake • Whiskey Lake) Coffee Lake Cascade Lake Comet Lake
Palm Cove	10 nm Cannon Lake
Sunny Cove	14 nm Cooper Lake 10 nm Ice Lake
Willow Cove	14 nm Rocket Lake 10 nm Tiger Lake Sapphire Rapids
Golden Cove	10 nm Alder Lake 7 nm Granite Rapids

Atom

Bonnell Saltwell	45 nm Silverthorne Diamondville Pineview Lincroft Tunnel Creek Stellarton Sodaville Groveland 32 nm Cedarview Penwell Cloverview Berryville Centerton
Silvermont Airmont	22 nm Valleyview Tangier Anniedale 14 nm Cherryview
Goldmont	14 nm Goldmont Goldmont Plus
Tremont	10 nm Tremont Gracemont

Intel CPU core roadmaps from P6 to Alder Lake

Microarchi.	Step	Feature size	Microarchi.	Step
Atom (ULV)		Feature size	x86
		600 nm	P6	Pentium Pro (133 MHz)
		500 nm		Pentium Pro (150 MHz)
		350 nm		Pentium Pro (166–200 MHz)
		350 nm		Klamath
		250 nm		Deschutes
		250 nm		Katmai		NetBurst
		180 nm		Coppermine		Willamette
		130 nm		Tualatin		Northwood
		130 nm		Banias		Northwood		NetBurst(HT)		NetBurst(×2)
		90 nm		Dothan		Prescott	⇨	Prescott‑2M	⇨	Smithfield
		90 nm		Dothan		~~Tejas~~	→	⇩	→	~~Cedarmill (Tejas)~~
		65 nm		Yonah		~~Nehalem (NetBurst)~~		Cedar Mill	⇨	Presler
		65 nm	Core	Merom	4 cores on mainstream desktop, DDR3 introduced
Bonnell	Bonnell	45 nm	Core	Penryn
	Bonnell	45 nm	Nehalem	Nehalem	HT reintroduced, integrated MC, PCH L3-cache introduced, 256KiB L2-cache/core
	Saltwell	32 nm	Nehalem	Westmere	introduced GPU on same package and AES-NI
	Saltwell	32 nm	Sandy Bridge	Sandy Bridge	on-die ring bus, no more non-UEFI motherboards
Silvermont	Silvermont	22 nm	Sandy Bridge	Ivy Bridge
	Silvermont	22 nm	Haswell	Haswell	FIVR
	Airmont	14 nm	Haswell	Broadwell
	Airmont		Skylake	Skylake	DDR4 introduced
Goldmont	Goldmont			Kaby Lake
				Coffee Lake	6 cores on mainstream desktop
				Amber Lake	mobile-only
	Goldmont Plus			Whiskey Lake	mobile-only
				Coffee Lake Refresh	8 cores on mainstream desktop
				Comet Lake	10 cores on mainstream desktop
			Willow Cove	Rocket Lake
Tremont	Tremont	10 nm	Palm Cove	Cannon Lake	mobile-only					Hybrid
	Tremont		Sunny Cove	Ice Lake	512KiB L2-cache/core					Lakefield
	Gracemont		Willow Cove	Tiger Lake	X^e graphics engine
	Gracemont		Golden Cove							Alder Lake

~~Strike-through~~ indicates cancelled processors
Bold names are the microarchitecture names
Italic names are future processors

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Sapphire Rapids

See also

References