IMPLY gate
The IMPLY gate is a digital logic gate that implements a logical conditional.
| INPUT A B | OUTPUT A → B | |
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
Symbols
There are two symbols for IMPLY gates: the traditional symbol and the IEEE symbol. For more information see Logic Gate Symbols.
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| Traditional IMPLY Symbol | IEEE IMPLY Symbol |
The logic symbol → can be used to denote IMPLY in algebraic expressions.
See also
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Wikimedia Commons has media related to IMPLY_gates. |
References
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