Comparison of ARMv7-A cores
This is a table comparing microarchitectures which implement the ARMv7-A (A means Application[1]) instruction set architecture and mandatory or optional extensions of it, the last AArch32.
Table
| Core | Decode width | Execution ports | Pipeline depth | Out-of-order execution | FPU | Pipelined VFP | FPU registers | NEON (SIMD) |
big.LITTLE role | Virtualization[2] | Process technology | L0 cache | L1 cache | L2 cache | Core configurations | Speed per core (DMIPS/MHz) |
ARM part number (in the main ID register) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ARM Cortex-A5 | 1 | 8 | No | VFPv4 (optional) | 16 × 64-bit | 64-bit wide (optional) | No | No | 40/28 nm | 4–64 KiB / core | 1, 2, 4 | 1.57 | 0xC05 | ||||
| ARM Cortex-A7 | 2 | 5[3] | 8 | No | VFPv4 | Yes | 16 × 64-bit | 64-bit wide | LITTLE | Yes[4] | 40/28 nm | 8–64 KiB / core | up to 1 MiB (optional) | 1, 2, 4, 8 | 1.9 | 0xC07 | |
| ARM Cortex-A8 | 2 | 2[5] | 13 | No | VFPv3 | No | 32 × 64-bit | 64-bit wide | No | No | 65/55/45 nm | 32 KiB + 32 KiB | 256 or 512 (typical) KiB | 1 | 2.0 | 0xC08 | |
| ARM Cortex-A9 | 2 | 3[6] | 8–11[7] | Yes | VFPv3 (optional) | Yes | (16 or 32) × 64-bit | 64-bit wide (optional) | Companion Core | No[7] | 65/45/40/32/28 nm | 32 KiB + 32 KiB | 1 MiB | 1, 2, 4 | 2.5 | 0xC09 | |
| ARM Cortex-A12 | 3 | 11 | Yes | VFPv4 | Yes | 32 × 64-bit | 128-bit wide | No[8] | Yes | 28nm | 32-64 KiB + 32 KiB | 256 KiB to 8 MiB | 1, 2, 4 | 3.0 | 0xC0D | ||
| ARM Cortex-A15 | 3 | 8[3] | 15/17-25 | Yes | VFPv4 | Yes | 32 × 64-bit | 128-bit wide | big | Yes[9] | 32/28/20 nm | 32 KiB + 32 KiB per core | up to 4 MiB per cluster, up to 8 MiB per chip | 2, 4, 8 (4×2) | 3.5 to 4.01 | 0xC0F | |
| ARM Cortex-A17 | 2[10] | 11+ | Yes | VFPv4 | Yes | 32 × 64-bit | 128-bit wide | big | Yes | 28nm | 32 KiB + 32 KiB per core | 256 KiB up to 8 MiB | up to 4 | 4.0 | 0xC0E | ||
| Qualcomm Scorpion | 2 | 3[11] | 10 | Yes (FXU&LSU Only)[12] | VFPv3 | Yes | 128-bit wide | No | 65/45 nm | 32 KiB + 32 KiB | 256 KiB (single-core) 512 KiB (dual-core) |
1, 2 | 2.1 | ? | |||
| Qualcomm Krait[13] | 3 | 7 | 11 | Yes | VFPv4[14] | Yes | 128-bit wide | No | 28 nm | 4 KiB + 4 KiB direct mapped | 16 KiB + 16 KiB 4-way set associative | 1 MiB 8-way set associative (dual-core)/2 MiB (quad-core) | 2, 4 | 3.3 (Krait 200) 3.39 (Krait 300) 3.39 (Krait 400) 3.51 (Krait 450) |
? | ||
| Apple A6 | 3 | 5 | 12 | Yes | VFPv4 | Yes | 32 × 64-bit | 128-bit wide | No | 32 nm | 32 KiB + 32 KiB | 1 MiB | 2 | 3.5 | ? |
See also
- Comparison of ARMv8-A cores
- List of ARM cores
- List of applications of ARM cores
- Multi-core processor
References
- "ARM V7 Differences". ARM Information Center. Retrieved 1 June 2016.
- "ARM Processor Hardware Virtualization Support". Retrieved 1 June 2016.
- "big.LITTLE Processing with ARM Cortex-A15 & Cortex-A7" (PDF). ARM Holdings. Archived from the original (PDF) on 17 October 2013. Retrieved 6 August 2014.
- "Cortex-A7 Processor". Retrieved 1 June 2016.
- "Cortex-A8_Architecture". Texas Instruments. Retrieved 6 August 2014.
- "The ARM Cortex-A9 Processors" (PDF). ARM Holdings. Archived from the original (PDF) on 17 November 2014. Retrieved 6 August 2014.
- "Cortex-A9 Processor". ARM Holdings. Retrieved 15 September 2014.
- http://community.arm.com/groups/processors/blog/2014/09/30/arm-cortex-a17-cortex-a12-processor-update
- "Cortex-A15 Processor". ARM Holdings. Retrieved 9 August 2016.
- "ARM Cortex-A17 MPCore Processor Technical Reference Manual" (PDF). ARM Holdings. Retrieved 18 September 2014.
- Klug, Brian (7 October 2011). "Qualcomm's New Snapdragon S4: MSM8960 & Krait Architecture Explored". Anandtech. Retrieved 6 August 2014.
- http://rtcgroup.com/arm/2007/presentations/253%20-%20ARM_DevCon_2007_Snapdragon_FINAL_20071004.pdf
- http://www.anandtech.com/show/4940/qualcomm-new-snapdragon-s4-msm8960-krait-architecture
- http://www.anandtech.com/show/5559/qualcomm-snapdragon-s4-krait-performance-preview-msm8960-adreno-225-benchmarks/2
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