VIA PadLock

VIA PadLock is a CPU instruction set found on processors produced by VIA Technologies and Zhaoxin. Introduced in 2003 with the "Centaur" CPUs, this instruction set provides hardware-accelerated random number generation, AES crypto, SHA1, SHA256, and Montgomery modular multiplication.[1][2]

Instructions

The PadLock instruction set can be divided into four subsets:[1]

  • RNG - Random number generation
    • XSTORE: Store Available Random Bytes (aka XSTORERNG)
    • REP XSTORE: Store ECX Random Byt
  • ACE - Advanced cryptography engine, for AES crypto; two versions
    • REP XCRYPTECB: Electronic Code Book
    • REP XCRYPTCBC: Cipher Block Chaining
    • REP XCRYPTCTR: Counter Mode (ACE2)
    • REP XCRYPTCFB: Cipher Feedback Mode
    • REP XCRYPTOFB: Output Feedback Mode
  • PHE - SHA hash engine
    • REP XSHA1: Hash Function SHA-1
    • REP XSHA256: Hash Function SHA-256
  • PMM - Montgomery multiplier
    • REP MONTMUL

The padlock capability is indicated via a CPUID instruction with EAX = 0xC0000000. If the resultant EAX >= 0xC0000001, the CPU is aware of Centaur features. An additional request with EAX = 0xC0000001 then returns PadLock support in EDX. The padlock capability can be toggled on or off with MSR 0X1107.[1]

VIA PadLock found on some Zhaoxin CPUs have SM3 hashing and SM4 crypto added.[3]

CPUs with PadLock
  • All VIA Nano CPUs support SHA, AES, and RNG.
  • All VIA Eden CPUs since 2003 (C3 Neremiah) support AES and RNG. All these released since 2006 support AES, RNG, SHA, and PMM.
  • All VIA C7 CPUs support AES, RNG, SHA, and PMM.

Supporting software
  • Linux kernel since 2.6.11 has PadLock AES. PadLock SHA was introduced in 2.6.19. These are handled as "hardware crypto devices".[4]
  • OpenBSD and FreeBSD support PadLock.[5]
  • OpenSSL supports PadLock AES and SHA since 2004 (0.9.7f/0.9.8a).[6]
  • GNU assembler supports PadLock since 2004.[7]

References
  1. "VIA PadLock Programming Guide". August 4, 2005.
  2. "VIA PadLock - Wicked Fast Encryption". www.logix.cz.
  3. "Kaixian ZX-C+ Series 4-core CPU". Shanghai Zhaoxin Semiconductor Co., Ltd.
  4. "VIA PadLock support for Linux". www.logix.cz.
  5. padlock(4) – FreeBSD Kernel Interfaces Manual
  6. "openssl/engines/e_padlock.c". GitHub.
  7. "Added new instructions for next version of VIA PadLock core. · bminor/binutils-gdb@30d1c83". GitHub.

See also
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