List of VIA microprocessor cores

This page lists x86-compliant microprocessors sold by VIA Technologies, grouped by technical merits: cores within same group have much in common.

Cyrix design (Cyrix III)

Marketing
name
CoreFrequencyFront-side busL1-cacheL2-cacheFPU
speed
Pipeline
stages
Typical powerVoltageProcess
Cyrix IIIJoshua350-450 MHz100-133 MHz64 KB256 KB100%?13-16 W2.2 V180 nm Al

Centaur Technology design

Cyrix III, C3

Marketing
name
CoreFrequencyFront-side busL1 cacheL2 cacheFPU
speed
Pipeline
stages
Typical powerVoltageProcess
Cyrix III, C3, 1GigaProSamuel (C5A)466-733 MHz100-133 MHz128 KB0 KB50%126.8-10.6 W1.8-2.0 V180 nm Al
Cyrix III, C3, 1GigaPro, Eden ESP, XP 2000+Samuel 2 (C5B)600-800 MHz100-133 MHz128 KB64 KB50%125.8-6.6 W1.5-1.65 V150 nm Al
C3, Eden ESPEzra (C5C)733-933 MHz100-133 MHz128 KB64 KB50%125.3-5.9 W1.35 V130 nm Al
C3Ezra-T (C5N)800-1000 MHz100-133 MHz64 KB64 KB50%125.3-11.8 W1.35 V130 nm Al

C3, C7

Marketing
name
CoreFrequencyFront-side busL1 cacheL2 cacheFPU
speed
Pipeline
stages
Typical powerVoltageProcess
C3, Eden ESP, Eden-NNehemiah (C5XL)800-1400 MHz133 MHz64 KB64 KB100%1615-19 W1.25-1.45 V130 nm Cu
C3Nehemiah+ (C5P)1-1.4 GHz133 MHz32 KB64 KB100%1611-12 W1.25 V130 nm Cu
C7, C7-D, C7-M, Eden, Eden ULVEsther (C5J)0.4-2.0 GHz400-533 MT/s32 KB128 KB100%1612-20 W0.9-1.1(?) V90 nm SOI
Series Model Core Frequency
[MHz]
Front-side bus
[MHz]
Year Process
[nm]
Package size
[mm2]
Power
[W]
L2 cache
[K]
L1 I/D cache
[K]
Performance
[SPEC2000]
Eden Eden ESPSamuel 2 300–60066/100/133200115035×352.5–66464/64Unknown
Eden ESPNehemiah 667–1000133/2002003–200413035×356–76464/64Unknown
Eden-NNehemiah 533–1000133200313015×152.5–76464/64Unknown
EdenEsther 400–1500400–8002006–20079030<7.512832/32Unknown
Eden X2Unknown 800Unknown20114011×6UnknownUnknownUnknownUnknown
C3 C3Samuel 2 667–800100–1332001150Unknown136464/64Unknown
C3Ezra 800–1000100–1332002130Unknown8.3–106464/64Unknown
C3Nehemiah 1000–1400133–200200313035×3515–216464/64Unknown
C3-MNehemiah 1000–1400133–200200313035×3511–196464/64Unknown
C7 C7-DEsther 1500–180040020069021×2120–2512816/16Unknown
C7-MEsther 1000–200040020059021×2112–2012816/16Unknown
C7Esther 1500–200080020079021×2112–2012816/16Unknown
QuadCore QuadCoreIsaiah 1000-1460106620114021×2127.54× 1024[4]4× 64/6430.1/24.1 rate[5]

Nano

See also

References

  1. "IA-32 implementation: VIA Cyrix III". sandpile.org. Archived from the original on 2007-07-09. Retrieved 2007-07-23.
  2. "IA-32 implementation: VIA C3". sandpile.org. Archived from the original on 2007-07-17. Retrieved 2007-07-23.
  3. "IA-32 implementation: VIA C7". sandpile.org. Archived from the original on 2007-06-30. Retrieved 2007-07-23.
  4. "VIA QuadCore Processor". Via.com. Retrieved 2014-02-03.
  5. "VIA Nano X2 Whitepaper" (PDF). Via.com. Archived from the original (PDF) on 27 May 2012. Retrieved 3 February 2014.
This article is issued from Wikipedia. The text is licensed under Creative Commons - Attribution - Sharealike. Additional terms may apply for the media files.